An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics

An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics

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Authors:	Liang-Bi Chen	National Sun Yat-Sen University, Kaohsiung, Taiwan, R.O.C.
	Ruei-Ting Gu	National Sun Yat-Sen University, Kaohsiung, Taiwan, R.O.C.
	Wei-Sheng Huang	National Sun Yat-Sen University, Kaohsiung, Taiwan, R.O.C.
	Chien-Chou Wang	National Sun Yat-Sen University, Kaohsiung, Taiwan, R.O.C.
	Wen-Chi Shiue	National Sun Yat-Sen University, Kaohsiung, Taiwan, R.O.C.
	Tsung-Yu Ho	National Sun Yat-Sen University, Kaohsiung, Taiwan, R.O.C.
	Yun-Nan Chang	National Sun Yat-Sen University, Kaohsiung, Taiwan, R.O.C.
	Shen-Fu Hsiao	National Sun Yat-Sen University, Kaohsiung, Taiwan, R.O.C.
	Chung-Nan Lee	National Sun Yat-Sen University, Kaohsiung, Taiwan, R.O.C.
	Ing-Jer Huang	National Sun Yat-Sen University, Kaohsiung, Taiwan, R.O.C.

	2009 Article
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Published in:

	· Proceeding
	ASP-DAC '09 Proceedings of the 2009 Asia and South Pacific Design Automation Conference
	Pages 131-132 IEEE Press Piscataway, NJ, USA ©2009 table of contents ISBN: 978-1-4244-2748-2

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