Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors

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Authors: Pingqiang Zhou University of Minnesota, Minneapolis, MN
Karthikk Sridharan University of Minnesota, Minneapolis, MN
Sachin S. Sapatnekar University of Minnesota, Minneapolis, MN
Published in:
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· Proceeding
ASP-DAC '09 Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Pages 179-184
IEEE Press Piscataway, NJ, USA ©2009
table of contents ISBN: 978-1-4244-2748-2
Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors 2009 Article
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