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Development of full-HD multi-standard video CODEC IP based on heterogeneous multiprocessor architecture

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Authors: Hiroaki Nakata Hitachi Ltd., Tokyo, Japan
Koji Hosogi Hitachi Ltd., Tokyo, Japan
Masakazu Ehama Hitachi Ltd., Tokyo, Japan
Takafumi Yuasa Hitachi Ltd., Tokyo, Japan
Toru Fujihira Hitachi Ltd., Tokyo, Japan
Kenichi Iwata Renesas Technology Corp., Tokyo, Japan
Motoki Kimura Renesas Technology Corp., Tokyo, Japan
Fumitaka Izuhara Renesas Technology Corp., Tokyo, Japan
Seiji Mochizuki Renesas Technology Corp., Tokyo, Japan
Masaki Nobori Renesas Technology Corp., Tokyo, Japan
Development of full-HD multi-standard video CODEC IP based on heterogeneous multiprocessor architecture 2009 Article
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· Proceeding
ASP-DAC '09 Proceedings of the 2009 Asia and South Pacific Design Automation Conference
IEEE Press Piscataway, NJ, USA ©2009
table of contents ISBN: 978-1-4244-2748-2

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