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Word-length selection for power minimization via nonlinear optimization
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Authors:
Jonathan A. Clarke
Imperial College London, London, UK
George A. Constantinides
Imperial College London, London, UK
Peter Y. K. Cheung
Imperial College London, London, UK
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· Journal
ACM Transactions on Design Automation of Electronic Systems (TODAES)
TODAES Homepage
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Volume 14 Issue 3, May 2009
ACM
New York, NY
, USA
table of contents
doi>
10.1145/1529255.1529261
2009 Article
Research
Refereed
Bibliometrics
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· Downloads (12 Months): 36
· Citation Count: 0
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Tags:
algorithms
algorithms implemented in hardware
automatic synthesis
bitwidth
design
optimization
performance
power consumption
power consumption
signal processing
synthesis
word length
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