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Accelerating multi-party scheduling for transaction-level modeling
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Authors:
Di Wang
Boston University, Boston, MA, USA
Vyas Venkataraman
Boston University, Boston, MA, USA
Zhen Wang
Boston University, Boston, MA, USA
Wei Qin
Boston University, Boston, MA, USA
Hangsheng Wang
Freescale Semiconductor Inc., Austin, TX, USA
Mrinal Bose
Freescale Semiconductor Inc., Austin, TX, USA
Jayanta Bhadra
Freescale Semiconductor Inc., Austin, TX, USA
2009 Article
Short paper
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Published in:
· Proceeding
GLSVLSI '09
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Pages 339-344
ACM
New York, NY
, USA
©2009
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ISBN: 978-1-60558-522-2
doi>
10.1145/1531542.1531619
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Tags:
algorithms
automatic synthesis
concurrent programming.
design
hardware description languages
languages
multiparty rendezvous
scheduling
transaction level modeling
verification
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