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Enabling ultra low voltage system operation by tolerating on-chip cache failures
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Authors:
Amin Ansari
University of Michigan, Ann Arbor, MI, USA
Shuguang Feng
University of Michigan, Ann Arbor, MI, USA
Shantanu Gupta
University of Michigan, Ann Arbor, MI, USA
Scott Mahlke
University of Michigan, Ann Arbor, MI, USA
2009 Article
Poster
Bibliometrics
· Downloads (6 Weeks): 2
· Downloads (12 Months): 30
· Citation Count: 1
Published in:
· Proceeding
ISLPED '09
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
ACM
New York, NY
, USA
©2009
table of contents
ISBN: 978-1-60558-684-7
doi>
10.1145/1594233.1594309
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ISLPED'12
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Tags:
design
dynamic voltage scaling
fault-tolerant cache
low voltage operation
reliability
reliability, testing, and fault-tolerance
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