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Architecture for dense matrix multiplication on a high-performance reconfigurable system
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Authors:
Viviane L. S. de Souza
Federal University of Pernambuco, Recife-PE, Brasil
Victor W. C. de Medeiros
Federal University of Pernambuco, Recife-PE, Brasil
Manoel E. de Lima
Federal University of Pernambuco, Recife-PE, Brasil
Published in:
· Proceeding
SBCCI '09
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
Article No. 42
ACM
New York, NY
, USA
©2009
table of contents
ISBN: 978-1-60558-705-9
doi>
10.1145/1601896.1601950
2009 Article
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algorithms
algorithms
brams
data reuse
design
fpga
mac
matrix multiplication
parallel algorithms
parallelism
performance
performance
rasc
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