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An SDRAM-aware router for Networks-on-Chip
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Authors:
Wooyoung Jang
University of Texas at Austin
David Z. Pan
University of Texas at Austin
Published in:
· Proceeding
DAC '09
Proceedings of the 46th Annual Design Automation Conference
ACM
New York, NY
, USA
©2009
table of contents
ISBN: 978-1-60558-497-3
doi>
10.1145/1629911.1630117
2009 Article
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· Downloads (6 Weeks): 3
· Downloads (12 Months): 32
· Citation Count: 6
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DAC '12
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Tags:
algorithms
design
flow control
memory
network architecture and design
networks-on-chip
performance
router
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