Characteristics of MS-CMOS logic in sub-32nm technologies

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Authors: Kagan Irez Columbia University , New York, NY, USA
Jiaping Hu Columbia University , New York, NY, USA
Charles A. Zukowski Columbia University, New York, NY, USA
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· Proceeding
GLSVLSI '10 Proceedings of the 20th symposium on Great lakes symposium on VLSI
Pages 393-396
ACM New York, NY, USA ©2010
table of contents ISBN: 978-1-4503-0012-4 doi>10.1145/1785481.1785572
Characteristics of MS-CMOS logic in sub-32nm technologies Published by ACM 2010 Article
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