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FAST: fast architecture sensitive tree search on modern CPUs and GPUs
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Authors:
Changkyu Kim
Intel Corporation, Santa Clara, CA, USA
Jatin Chhugani
Intel Corporation, Santa Clara, CA, USA
Nadathur Satish
Intel Corporation, Santa Clara, CA, USA
Eric Sedlar
Oracle Corporation, Redwood Shores, WA, USA
Anthony D. Nguyen
Intel Corporation, Santa Clara, CA, USA
Tim Kaldewey
Oracle Corporation, Redwood Shores, WA, USA
Victor W. Lee
Intel Corporation, Santa Clara, CA, USA
Scott A. Brandt
University of California at Santa Cruz, Santa Cruz, CA, USA
Pradeep Dubey
Intel Corporation, Santa Clara, CA, USA
2010 Article
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· Citation Count: 17
Published in:
· Proceeding
SIGMOD '10
Proceedings of the 2010 ACM SIGMOD International Conference on Management of data
Pages 339-350
ACM
New York, NY
, USA
©2010
table of contents
ISBN: 978-1-4503-0032-2
doi>
10.1145/1807167.1807206
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Tags:
algorithms
compression
cpu
data-level parallelism
gpu
performance
systems
thread-level parallelism
tree search
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