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RAPL: memory power estimation and capping
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Authors:
Howard David
Intel, Hillsboro, OR, USA
Eugene Gorbatov
Intel, Hillsboro, OR, USA
Ulf R. Hanebutte
Intel, Hillsboro, OR, USA
Rahul Khanna
Intel, Hillsboro, OR, USA
Christian Le
Intel, Hillsboro, OR, USA
2010 Article
Poster
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Published in:
· Proceeding
ISLPED '10
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Pages 189-194
ACM
New York, NY
, USA
©2010
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ISBN: 978-1-4503-0146-6
doi>
10.1145/1840845.1840883
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design
design studies
dram memory
experimentation
measurement
measurements
performance
power
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