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Detection of Transactional Memory anomalies using static analysis
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Authors:
Bruno Teixeira
FCT / Univ. Nova de Lisboa, Caparica, Portugal
João Lourenço
FCT / Univ. Nova de Lisboa, Caparica, Portugal
Eitan Farchi
IBM HRL, Haifa, Israel
Ricardo Dias
FCT / Univ. Nova de Lisboa, Caparica, Portugal
Diogo Sousa
FCT / Univ. Nova de Lisboa, Caparica, Portugal
2010 Article
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Published in:
· Proceeding
PADTAD '10
Proceedings of the 8th Workshop on Parallel and Distributed Systems: Testing, Analysis, and Debugging
Pages 26-36
ACM
New York, NY
, USA
©2010
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ISBN: 978-1-4503-0136-7
doi>
10.1145/1866210.1866213
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Tags:
algorithms
concurrency
design tools and techniques
diagnostics
experimentation
languages
parallel programming
reliability
software transactional memory
static analysis
testing
verification
verification
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