DEEP: an iterative fpga-based many-core emulation system for chip verification and architecture research

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Authors: Juergen Ributzka University of Delaware, Newark, DE, USA
Yuhei Hayashi University of Delaware, Newark, DE, USA
Fei Chen ARM Inc., Austin, TX, USA
Guang R. Gao University of Delaware, Newark, DE, USA
DEEP: an iterative fpga-based many-core emulation system for chip verification and architecture research Published by ACM 2011 Article
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· Proceeding
FPGA '11 Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Pages 115-118
ACM New York, NY, USA ©2011
table of contents ISBN: 978-1-4503-0554-9 doi>10.1145/1950413.1950438

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