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HSIS: a BDD-based environment for formal verification
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Authors:
A. Aziz
Department of EECS, University of California at Berkeley, Berkeley, CA
F. Balarin
Department of EECS, University of California at Berkeley, Berkeley, CA
S.-T. Cheng
Department of EECS, University of California at Berkeley, Berkeley, CA
R. Hojati
Department of EECS, University of California at Berkeley, Berkeley, CA
T. Kam
Department of EECS, University of California at Berkeley, Berkeley, CA
S. C. Krishnan
Department of EECS, University of California at Berkeley, Berkeley, CA
R. K. Ranjan
Department of EECS, University of California at Berkeley, Berkeley, CA
T. R. Shiple
Department of EECS, University of California at Berkeley, Berkeley, CA
V. Singhal
Department of EECS, University of California at Berkeley, Berkeley, CA
S. Tasiran
Department of EECS, University of California at Berkeley, Berkeley, CA
H.-Y. Wang
Department of EECS, University of California at Berkeley, Berkeley, CA
R. K. Brayton
Department of EECS, University of California at Berkeley, Berkeley, CA
A. L. Sangiovanni-Vincentelli
Department of EECS, University of California at Berkeley, Berkeley, CA
1994 Article
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· Proceeding
DAC '94 Proceedings of the 31st annual Design Automation Conference
Pages 454-459
ACM
New York, NY
, USA
©1994
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ISBN:0-89791-653-0
doi>
10.1145/196244.196467
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Tags:
algorithms
design
experimentation
hardware description languages
languages
verification
vhdl
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