Layout-aware variation evaluation of analog circuits and its validity on op-amp designs

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Authors:	Kota Shinohara	The University of Kitakyushu, Kitakyushu, Japan
	Mihoko Hidaka	The University of Kitakyushu, Kitakyushu, Japan
	Jing Li	The University of Kitakyushu, Kitakyushu, Japan
	Qing Dong	The University of Kitakyushu, Kitakyushu, Japan
	Bo Yang	The University of Kitakyushu, Kitakyushu, Japan
	Shigetoshi Nakatake	The University of Kitakyushu, Kitakyushu, Japan

	2011 Article
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	· Proceeding
	GLSVLSI '11 Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
	Pages 247-252 ACM New York, NY, USA ©2011 table of contents ISBN: 978-1-4503-0667-6 doi>10.1145/1973009.1973059

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