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An efficient verification algorithm for parallel controllers
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Authors:
Krzysztof Biliński
Department of Electrical and Electronic Engineering, University of Bristol, Bristol BS8 1TR, United Kingdom
E. L. Dagless
Department of Electrical and Electronic Engineering, University of Bristol, Bristol BS8 1TR, United Kingdom
Jonathan Saul
Department of Electrical and Electronic Engineering, University of Bristol, Bristol BS8 1TR, United Kingdom
Janusz Szajna
Department of Computer Engineering and Electronics, Higher College of Engineering, 65-246 Zielona Gora, Poland
1994 Article
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Published in:
· Proceeding
EURO-DAC '94 Proceedings of the conference on European design automation
IEEE Computer Society Press
Los Alamitos, CA
, USA
©1994
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ISBN:0-89791-685-9
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algorithms
design
simulation
verification
verification
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