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Petri nets as intermediate representation between VHDL and symbolic transition systems
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Author:
Gert Döhmen
Kuratorium OFFIS, Westerstr. 10-12, D-26121 Oldenburg
Published in:
· Proceeding
EURO-DAC '94 Proceedings of the conference on European design automation
IEEE Computer Society Press
Los Alamitos, CA
, USA
©1994
table of contents
ISBN:0-89791-685-9
1994 Article
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· Downloads (12 Months): 14
· Citation Count: 2
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algorithms
design
languages
verification
vhdl
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