SIGN IN
SIGN UP
Memory access optimization in compilation for coarse-grained reconfigurable architectures
Full Text:
PDF
Buy this Article
Authors:
Yongjoo Kim
Seoul National University, Seoul, Korea
Jongeun Lee
Ulsan National Institute of Science and Technology, Ulsan, Korea
Aviral Shrivastava
Arizona State University
Yunheung Paek
Seoul National University, Seoul, Korea
2011 Article
Research
Refereed
Bibliometrics
· Downloads (6 Weeks): 9
· Downloads (12 Months): 93
· Downloads (cumulative): 261
· Citation Count: 1
Published in:
· Journal
ACM Transactions on Design Automation of Electronic Systems (TODAES)
TODAES Homepage
archive
Volume 16 Issue 4, October 2011
Article No. 42
ACM
New York, NY
, USA
table of contents
doi>
10.1145/2003695.2003702
Tools and Resources
Buy this Article
Request Permissions
TOC Service:
Email
RSS
Save to Binder
Export Formats:
BibTeX
EndNote
ACM Ref
Share:
|
Tags:
algorithms
array mapping
bank conflict
coarse-grained reconfigurable architecture
code generation
compilation
design
multibank memory
optimization
performance
real-time and embedded systems
Feedback
|
Switch to
single page view
(no tabs)
**Javascript is not enabled and is required for the "tabbed view" or switch to the
single page view
**
Powered by
The ACM Guide to Computing Literature
All Tags
Export Formats
Save to Binder