SIGN IN
SIGN UP
Logic partition orderings for multi-FPGA systems
Full Text:
PDF
Buy this Article
Authors:
Scott Hauck
Department of Computer Science and Engineering, University of Washington, Seattle, WA
Gaetano Borriello
Department of Computer Science and Engineering, University of Washington, Seattle, WA
Published in:
· Proceeding
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Pages 32-38
ACM
New York, NY
, USA
©1995
table of contents
ISBN:0-89791-743-X
doi>
10.1145/201310.201315
1995 Article
Bibliometrics
· Downloads (6 Weeks): 1
· Downloads (12 Months): 8
· Downloads (cumulative): 282
· Citation Count: 5
Tools and Resources
Buy this Article
Request Permissions
TOC Service:
Email
RSS
Save to Binder
Export Formats:
BibTeX
EndNote
ACM Ref
Upcoming Conference:
FPGA'14
Share:
|
Tags:
algorithms
design
experimentation
gate arrays
layout
placement and routing
Feedback
|
Switch to
single page view
(no tabs)
**Javascript is not enabled and is required for the "tabbed view" or switch to the
single page view
**
Powered by
The ACM Guide to Computing Literature
All Tags
Export Formats
Save to Binder