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Harmonia: a transparent, efficient, and harmonious dynamic binary translator targeting the Intel® architecture
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Authors:
Guilherme Ottoni
Microarchitecture Research Lab, Intel Labs
Thomas Hartin
Atom Processor Architecture, Intel Corporation
Christopher Weaver
Atom Processor Architecture, Intel Corporation
Jason Brandt
Atom Processor Architecture, Intel Corporation
Belliappa Kuttanna
Atom Processor Architecture, Intel Corporation
Hong Wang
Microarchitecture Research Lab, Intel Labs
2011 Article
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Published in:
· Proceeding
CF '11
Proceedings of the 8th ACM International Conference on Computing Frontiers
Article No. 26
ACM
New York, NY
, USA
©2011
table of contents
ISBN: 978-1-4503-0698-0
doi>
10.1145/2016604.2016635
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Tags:
algorithms
code generation
compilers
condition-code emulation
design
dynamic binary translation
instruction-set architecture
intel® architecture
measurement
optimization
performance
register mapping
run-time environments
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