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A method to leverage pre-silicon collateral and analysis for post-silicon testing and validation
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Authors:
Gary Miller
Freescale Semiconductor Inc., Austin, TX
Bandana Bhattarai
Freescale Semiconductor Inc., Austin, TX
Yu-Chin Hsu
SpringSoft Inc., San Jose, CA
Jay Dutt
SpringSoft Inc., San Jose, CA
Xi Chen
SpringSoft Inc., San Jose, CA
George Bakewell
SpringSoft Inc., San Jose, CA
2011 Article
Bibliometrics
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Published in:
· Proceeding
DAC '11
Proceedings of the 48th Design Automation Conference
Pages 575-578
ACM
New York, NY
, USA
©2011
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ISBN: 978-1-4503-0636-2
doi>
10.1145/2024724.2024857
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Tags:
algorithms
fault detection
measurement
mutation
reliability
reliability, testing, and fault-tolerance
safety-critical
test planning
verification
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