Efficient in-system RTL verification and debugging using FPGAs (abstract only)

Authors: Proshanta Saha IBM T.J. Watson Research Center, Yorktown Heights, NY, USA
Chuck Haymes IBM T. J. Watson Research Center, Yorktown Heights, NY, USA
Ralph Bellofatto IBM T. J. Watson Research Center, Yorktown Heights, NY, USA
Bernard Brezzo IBM T. J. Watson Research Center, Yorktown Heights, NY, USA
Mohit Kapur IBM T. J. Watson Research Center, Yorktown Heights, NY, USA
Sameh Asaad IBM T. J. Watson Research Center, Yorktown Heights, NY, USA
Efficient in-system RTL verification and debugging using FPGAs (abstract only) Published by ACM 2012 Article
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· Proceeding
FPGA '12 Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Pages 269-269
ACM New York, NY, USA ©2012
table of contents ISBN: 978-1-4503-1155-7 doi>10.1145/2145694.2145753

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