A novel power-gating scheme utilizing data retentiveness on caches

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Authors: Kyundong Kim The University of Tokyo, Tokyo, Japan
Seidai Takeda The University of Tokyo, Tokyo, Japan
Shinobu Miwa The University of Tokyo, Tokyo, Japan
Hiroshi Nakamura The University of Tokyo, Tokyo, Japan
A novel power-gating scheme utilizing data retentiveness on caches Published by ACM 2012 Article
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GLSVLSI '12 Proceedings of the great lakes symposium on VLSI
Pages 91-94
ACM New York, NY, USA ©2012
table of contents ISBN: 978-1-4503-1244-8 doi>10.1145/2206781.2206805

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