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Lithography-aware layout compaction
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Authors:
Curtis Andrus
University of California, Santa Cruz, Santa Cruz, CA, USA
Matthew R. Guthaus
University of California, Santa Cruz, Santa Cruz, CA, USA
Published in:
· Proceeding
GLSVLSI '12
Proceedings of the great lakes symposium on VLSI
Pages 147-152
ACM
New York, NY
, USA
©2012
table of contents
ISBN: 978-1-4503-1244-8
doi>
10.1145/2206781.2206818
2012 Article
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Tags:
algorithms
design
design for manufacturing
layout
optical proximity correction
reliability
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