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Fast discrete function evaluation using decision diagrams
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Authors:
Patrick C. McGeer
Cadence Berkeley Laboratories
Kenneth L. McMillan
Cadence Berkeley Laboratories
Alexander Saldanha
Cadence Berkeley Laboratories
Alberto L. Sangiovanni-Vincentelli
Cadence Berkeley Laboratories
Patrick Scaglia
Cadence Berkeley Laboratories
1995 Article
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· Downloads (12 Months): 14
· Citation Count: 26
Published in:
· Proceeding
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
IEEE Computer Society
Washington, DC
, USA
©1995
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ISBN:0-8186-7213-7
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Tags:
address lookups
circuit analysis computing
cycle-based logic simulation
decision theory
decision-diagram based function evaluation
digital circuits
fast discrete function evaluation
function evaluation
latch ports
logic cad
logic design
logic function
logic simulators
measurement
memory bandwidth
memory hierarchy
multi-valued decision diagrams
orders-of-magnitude potential speedup
output ports
performance
switching theory
table lookup
theory
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