From VHDL to efficient and first-time-right designs: a formal approach

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Authors: Peter F. A. Middelhoek Univ. of Twente, The Netherlands
Sreeranga P. Rajan Fujitsu Labs. of America
Published in:
· Journal
ACM Transactions on Design Automation of Electronic Systems (TODAES) TODAES Homepage archive
Volume 1 Issue 2, April 1996
Pages 205 - 250
ACM New York, NY, USA
table of contents doi>10.1145/233539.233541
From VHDL to efficient and first-time-right designs: a formal approach Published by ACM 1996 Article
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