Post-layout optimization for deep submicron design

doi:10.1145/240518.240659

Post-layout optimization for deep submicron design

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Authors:	Koichi Sato	Advanced CAD Development Laboratory, ULSI Systems Development Laboratories, NEC Corporation, Kawasaki, Kanagawa 211 Japan
	Masamichi Kawarabayashi	Advanced CAD Development Laboratory, ULSI Systems Development Laboratories, NEC Corporation, Kawasaki, Kanagawa 211 Japan
	Hideyuki Emura	Advanced CAD Development Laboratory, ULSI Systems Development Laboratories, NEC Corporation, Kawasaki, Kanagawa 211 Japan
	Naotaka Maeda	Advanced CAD Development Laboratory, ULSI Systems Development Laboratories, NEC Corporation, Kawasaki, Kanagawa 211 Japan

	1996 Article
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	· Proceeding
	DAC '96 Proceedings of the 33rd annual Design Automation Conference
	ACM New York, NY, USA ©1996 table of contents ISBN:0-89791-779-0 doi>10.1145/240518.240659

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