An efficient approach to simultaneous transistor and interconnect sizing

Full Text: PDFPDF Buy this ArticleBuy this Article
Authors: Jason Cong Department of Computer Science, University of California, Los Angeles, CA
Lei He Department of Computer Science, University of California, Los Angeles, CA
Published in:
Cover Image
 
· Proceeding
ICCAD '96 Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Pages 181-186
IEEE Computer Society Washington, DC, USA ©1996
table of contents ISBN:0-8186-7597-7
An efficient approach to simultaneous transistor and interconnect sizing 1997 Article
Bibliometrics Data  Bibliometrics
· Downloads (6 Weeks): 1
· Downloads (12 Months): 7
· Downloads (cumulative): 190
· Citation Count: 9


Tools and Resources

Share:

|
feedback Feedback | Switch to single page view (no tabs)

Powered by The ACM Guide to Computing Literature


The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2013 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player
The ACM Guide to Computing Literature
All Tags
Export Formats
 
 
Save to Binder