A design for testability technique for RTL circuits using control/data flow extraction

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Authors: Indradeep Ghosh Department of Electrical Engineering, Princeton University, Princeton, NJ
Anand Raghunathan Department of Electrical Engineering, Princeton University, Princeton, NJ
Niraj K. Jha Department of Electrical Engineering, Princeton University, Princeton, NJ
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· Proceeding
ICCAD '96 Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Pages 329-336
IEEE Computer Society Washington, DC, USA ©1996
table of contents ISBN:0-8186-7597-7
A design for testability technique for RTL circuits using control/data flow extraction 1997 Article
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