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ACV: an arithmetic circuit verifier
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Authors:
Yirng-An Chen
Carnegie Mellon University, Pittsburgh, PA
Randal E. Bryant
Carnegie Mellon University, Pittsburgh, PA
Published in:
· Proceeding
ICCAD '96
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
IEEE Computer Society
Washington, DC
, USA
©1996
table of contents
ISBN:0-8186-7597-7
1997 Article
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· Downloads (12 Months): 1
· Citation Count: 12
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ICCAD '12
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Tags:
algorithms
arithmetic and logic units
design
experimentation
formal verification, arithmetic circuit, binary moment diagram, bmd, hierarchical verification.
hardware description languages
verification
verification
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