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Width minimization of two-dimensional CMOS cells using integer programming
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Authors:
Avaneendra Gupta
Advanced Computer Architecture Lab., Dept. of Electrical Engr. and Computer Science, The University of Michigan, Ann Arbor, MI and Design Technology Division, Intel Corporation, 2200 Mission Colle ...
John P. Hayes
Advanced Computer Architecture Lab., Dept. of Electrical Engr. and Computer Science, The University of Michigan, Ann Arbor, MI
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· Proceeding
ICCAD '96
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
IEEE Computer Society
Washington, DC
, USA
©1996
table of contents
ISBN:0-8186-7597-7
1997 Article
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· Downloads (12 Months): 7
· Citation Count: 7
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Tags:
algorithms
design
experimentation
general
integer programming
layout optimization, leaf cell synthesis, module generation, two-dimensional layout, diffusion sharing, transistor chains, cmos networks
performance
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