Fully depleted CMOS/SOI device design guidelines for low power applications

doi:10.1145/263272.263361

Fully depleted CMOS/SOI device design guidelines for low power applications

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Authors:	Srinivasa R. Banna	Department of Electrical and Electronic Engineering, Hong Kong University of Science and Technology, Clear Water Bay, Kowloon, Hong Kong
	Philip C. H. Chan	Department of Electrical and Electronic Engineering, Hong Kong University of Science and Technology, Clear Water Bay, Kowloon, Hong Kong
	Mansun Chan
	Samuel K. H. Fung	Department of Electrical and Electronic Engineering, Hong Kong University of Science and Technology, Clear Water Bay, Kowloon, Hong Kong
	Ping K. Ko	Department of Electrical and Electronic Engineering, Hong Kong University of Science and Technology, Clear Water Bay, Kowloon, Hong Kong

	1997 Article
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	· Proceeding
	ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
	ACM New York, NY, USA ©1997 table of contents ISBN:0-89791-903-3 doi>10.1145/263272.263361

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