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FPGA circuit optimization based on block integration (abstract)
Author:
Takenori Kouda Yahiko Kambayashi
Published in:
· Proceeding
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Page 257
ACM
New York, NY
, USA
©1998
table of contents
ISBN:0-89791-978-5
doi>
10.1145/275107.275151
1998 Article
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algorithms
design
design aids
gate arrays
performance
performance analysis and design aids
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