Soft decision maximum likelihood decoders for binary linear block codes implemented on FPGAs (abstract)

Authors: Hidehisa Nagano
Takayuki Suyama
Akira Nagoya
Published in:
Cover Image
 
· Proceeding
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Page 261
ACM New York, NY, USA ©1998
table of contents ISBN:0-89791-978-5 doi>10.1145/275107.275166
Soft decision maximum likelihood decoders for binary linear block codes implemented on FPGAs (abstract) Published by ACM 1998 Article
Bibliometrics Data  Bibliometrics
· Downloads (6 Weeks): n/a
· Downloads (12 Months): n/a
· Downloads (cumulative): n/a
· Citation Count: 0


Tools and Resources

Share:

|
feedback Feedback | Switch to single page view (no tabs)

Powered by The ACM Guide to Computing Literature


The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2013 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player
The ACM Guide to Computing Literature
All Tags
Export Formats
 
 
Save to Binder