Design methodology of a 200MHz superscalar microprocessor: SH-4

doi:10.1145/277044.277108

Design methodology of a 200MHz superscalar microprocessor: SH-4

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Authors:	Toshihiro Hattori	Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan
	Yusuke Nitta	Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan
	Mitsuho Seki	Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan
	Susumu Narita	Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan
	Kunio Uchiyama	Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan
	Tsuyoshi Takahashi	Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan
	Ryuichi Satomura	Hitachi, Ltd., 1-280 Higashi-Koigakubo, Kokubunji, Tokyo 185-8601, Japan

	1998 Article
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	· Proceeding
	DAC '98 Proceedings of the 35th annual Design Automation Conference
	Pages 246-249 ACM New York, NY, USA ©1998 table of contents ISBN:0-89791-964-5 doi>10.1145/277044.277108

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Tags: design design methodology measurement microprocessor microprocessor/microcomputer applications performance performance of systems theory timing verification verification

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