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A statistical performance simulation methodology for VLSI circuits
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Authors:
Michael Orshansky
Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA
James C. Chen
Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA
Chenming Hu
Department of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, CA
Published in:
· Proceeding
DAC '98 Proceedings of the 35th annual Design Automation Conference
Pages 402-407
ACM
New York, NY
, USA
©1998
table of contents
ISBN:0-89791-964-5
doi>
10.1145/277044.277153
1998 Article
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Tags:
custom sizing, migration, timing optimazation
design
general
measurement
performance
theory
vlsi
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