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Kin
: a high performance asynchronous processor architecture
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Authors:
Rakefet Kol
VLSI Systems Research Center, Electrical Engineering Department, Technion - Israel Institute of Technology, Haifa 32000, Israe
Ran Ginosar
VLSI Systems Research Center, Electrical Engineering Department, Technion - Israel Institute of Technology, Haifa 32000, Israe
Published in:
· Proceeding
ICS '98 Proceedings of the 12th international conference on Supercomputing
ACM
New York, NY
, USA
©1998
table of contents
ISBN:0-89791-998-X
doi>
10.1145/277830.277937
1998 Article
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Tags:
asynchronous architecture
asynchronous/synchronous operation
avid execution
design
dynamic instance tag
measurement
multi-execution
performance
pruning
synchronization
theory
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