High-level design verification of microprocessors via error modeling

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Authors: D. Van Campenhout University of Michigan, Ann Arbor
H. Al-Asaad University of Michigan, Ann Arbor
J. P. Hayes University of Michigan, Ann Arbor
T. Mudge University of Michigan, Ann Arbor
R. B. Brown University of Michigan, Ann Arbor
High-level design verification of microprocessors via error modeling Published by ACM 1998 Article
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ACM Transactions on Design Automation of Electronic Systems (TODAES) TODAES Homepage archive
Volume 3 Issue 4, Oct. 1998
Pages 581 - 599
ACM New York, NY, USA
table of contents doi>10.1145/296333.296347

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