Hierarchical placement directives for parametric IP blocks

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Authors: James Hwang Xilinx, San Jose, CA
Cameron Patterson Xilinx, San Jose, CA
Sujoy Mitra Xilinx, San Jose, CA
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· Proceeding
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Page 250
ACM New York, NY, USA ©1999
table of contents ISBN:1-58113-088-0 doi>10.1145/296399.296517
Hierarchical placement directives for parametric IP blocks Published by ACM 1999 Article
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