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A partitioning algorithm for system-level synthesis
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Authors:
G. Menez
Laboratoire d'Informatique Signaux et Systèmes, CNRS / Université de Nice Sophia - Antipolis, 41 Bd Napoleon III - 06041, Nice Cedex - France
M. Auguin
Laboratoire d'Informatique Signaux et Systèmes, CNRS / Université de Nice Sophia - Antipolis, 41 Bd Napoleon III - 06041, Nice Cedex - France
F. Boéri
Laboratoire d'Informatique Signaux et Systèmes, CNRS / Université de Nice Sophia - Antipolis, 41 Bd Napoleon III - 06041, Nice Cedex - France
C. Carrière
Laboratoire d'Informatique Signaux et Systèmes, CNRS / Université de Nice Sophia - Antipolis, 41 Bd Napoleon III - 06041, Nice Cedex - France
1992 Article
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· Proceeding
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
IEEE Computer Society Press
Los Alamitos, CA
, USA
©1992
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ISBN:0-89791-540-2
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algorithms
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design
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performance analysis and design aids
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