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Automated extraction of SPICE circuit models from symbolic gate matrix layout with pruning
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Authors:
R. D. Freeman
Coordinated Science Lab, Univ.of Illinois at Urbana-Champaign 1101 W.Sprignfield Avenue, Urbana IL and AT&T Bell Laboratories, Murray Hill, New Jersey
S. M. Kang
Coordinated Science Lab., Univ. of Illinois at Urbana-Champaign, 1101 W. Springfield Avenue Urbana, IL
C. G. Lin-Hendel
AT&T Bell Laboratories, Murray Hill, New Jersey
M. L. Newby
AT&T Bell Laboratories, Murray Hill, New Jersey
1986 Article
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· Proceeding
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Pages 418-424
IEEE Press
Piscataway, NJ
, USA
©1986
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ISBN:0-8186-0702-5
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algorithms
design
experimentation
layout
measurement
performance
spice
theory
vlsi
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