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Optimal order of the VLSI IC testing sequence
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Author:
Wojciech Maly
Department of Electrical and Computer Engineering, Carnegie-Mellon University, Pittsburgh, Pennsylvania
Published in:
· Proceeding
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Pages 560-566
IEEE Press
Piscataway, NJ
, USA
©1986
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ISBN:0-8186-0702-5
1986 Article
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design
measurement
performance
reliability
simulation
theory
verification
vlsi
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