A rule-based logic circuit synthesis system for CMOS gate arrays

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Authors: Takao Saito Fujitsu Laborarories Ltd, 1015, Kamikodanaka, Nakahara-ku, Kawasaki 211, Japan
Hiroyuki Sugimoto Fujitsu Laborarories Ltd, 1015, Kamikodanaka, Nakahara-ku, Kawasaki 211, Japan
Masami Yamazaki Fujitsu Ltd, 1015, Kamikodanaka, Nakahara-ku, Kawasaki 211, Japan
Nobuaki Kawato Fujitsu Laborarories Ltd, 1015, Kamikodanaka, Nakahara-ku, Kawasaki 211, Japan
A rule-based logic circuit synthesis system for CMOS gate arrays 1986 Article
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· Proceeding
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Pages 594-600
IEEE Press Piscataway, NJ, USA ©1986
table of contents ISBN:0-8186-0702-5

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