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A delay test system for high speed logic LSI's

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Authors: K. Kishida Device Development Center, Hitachi Ltd. 2326, Imai Ome-shi, Tokyo 198, Japan
F. Shirotori Device Development Center, Hitachi Ltd. 2326, Imai Ome-shi, Tokyo 198, Japan
Y. Ikemoto Device Development Center, Hitachi Ltd. 2326, Imai Ome-shi, Tokyo 198, Japan
S. Ishiyama Kanagawa Works, Hitachi Ltd., 2326, Imai Ome-shi, Tokyo 198, Japan
T. Hayashi Hitachi Research Laboratory, Hitachi Ltd., 2326, Imai Ome-shi, Tokyo 198, Japan
A delay test system for high speed logic LSI's 1986 Article
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· Proceeding
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
IEEE Press Piscataway, NJ, USA ©1986
table of contents ISBN:0-8186-0702-5

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