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Power optimization of system-level address buses based on software profiling

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Authors: W. Fornaciari Politecnico di Milano, Dip. di Elettronica e Informazione, Milano, ITALY 20133 and CEFRIEL, Milano, ITALY 20133
M. Polentarutti CEFRIEL, Milano, ITALY 20133
D. Sciuto Politecnico di Milano, Dip. di Elettronica e Informazione, Milano, ITALY 20133 and CEFRIEL, Milano, ITALY 20133
C. Silvano Politecnico di Milano, Dip. di Elettronica e Informazione, Milano, ITALY 20133 and CEFRIEL, Milano, ITALY 20133
Power optimization of system-level address buses based on software profiling Published by ACM 2000 Article
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CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
ACM New York, NY, USA ©2000
table of contents ISBN:1-58113-268-9 doi>10.1145/334012.334018

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