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Power minimization derived from architectural-usage of VLIW processors
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Authors:
C. Gebotys
Department of Electrical and Computer Engineering, Wilfrid Laurier University, Waterloo, Ontario Canada N2L 3G1
R. Gebotys
S. Wiratunga
Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario Canada N2L 3G1
Published in:
· Proceeding
DAC '00
Proceedings of the 37th Annual Design Automation Conference
Pages 308-311
ACM
New York, NY
, USA
©2000
table of contents
ISBN:1-58113-187-9
doi>
10.1145/337292.337426
2000 Article
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· Citation Count: 5
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