Design of system-on-a-chip test access architectures under place-and-route and power constraints

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Author: Krishnendu Chakrabarty Department of Electrical & Computer Engineering, Duke University, Durham, NC
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· Proceeding
DAC '00 Proceedings of the 37th Annual Design Automation Conference
Pages 432-437
ACM New York, NY, USA ©2000
table of contents ISBN:1-58113-187-9 doi>10.1145/337292.337531
Design of system-on-a-chip test access architectures under place-and-route and power constraints Published by ACM 2000 Article
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