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Power minimization using control generated clocks
Authors:
M. Srikanth Rao
S. K. Nandy
Published in:
· Proceeding
DAC '00
Proceedings of the 37th Annual Design Automation Conference
Pages 794-799
ACM
New York, NY
, USA
©2000
table of contents
ISBN:1-58113-187-9
doi>
10.1145/337292.337781
2000 Article
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algorithms
data-path design
design
measurement
performance
theory
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