Noise-aware power optimization for on-chip interconnect

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Authors: Ki-Wook Kim Coordinated Science Laboratory, Univ. of Illinois at Urbana-Champaign
Seong-Ook Jung Coordinated Science Laboratory, Univ. of Illinois at Urbana-Champaign
Unni Narayanan Design Technology, Intel Corporation, Santa Clara
C. L. Liu Dept. of Computer Science, National Tsing Hua University, Taiwan
Sung-Mo Kang Coordinated Science Laboratory, Univ. of Illinois at Urbana-Champaign
Noise-aware power optimization for on-chip interconnect Published by ACM 2000 Article
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ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Pages 108-113
ACM New York, NY, USA ©2000
table of contents ISBN:1-58113-190-9 doi>10.1145/344166.344537

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