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Microprocessor power analysis by labeled simulation
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Authors:
C. Hsieh
Dept. of EE-Systems, University of Southern California, Los Angeles, CA
L. Chen
Dept. of EE-Systems, University of Southern California, Los Angeles, CA
M. Pedram
Dept. of EE-Systems, University of Southern California, Los Angeles, CA
Published in:
· Proceeding
DATE '01
Proceedings of the conference on Design, automation and test in Europe
Pages 182-189
IEEE Press
Piscataway, NJ
, USA
©2001
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ISBN:0-7695-0993-2
2001 Article
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Tags:
algorithms
combined
design
microprocessor/microcomputer applications
microprocessors and microcomputers
performance
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